1. Field of the Invention
The present invention relates to an analog buffer, and more particularly, to an analog buffer for a flat panel display device.
2. Discussion of the Related Art
In general, among flat panel display devices for displaying images, thin film type flat panel display devices are thin and lightweight. The thin film type flat panel display devices have been recently developed because of their versatility. In particular, they are used in high resolution and high reaction speed liquid crystal display devices (LCD) that are capable of displaying moving pictures.
LCD devices use the optical anisotropy of liquid crystal molecules to transmit or block light transmission. Liquid crystal molecules transmit or block light depending upon their orientation. The orientation of the liquid crystal molecules can be controlled by applying an electric field.
Recently, active matrix type LCDs have been widely used because they provide excellent picture quality. In an active matrix LCD, pixels are arranged according to a matrix and image information is selectively supplied to the respective pixels through switching elements, such as thin film transistors (TFT), disposed in the respective pixels. A substrate used for the LCD is made of a transparent material, such as glass, which is cheap and is easily processed.
When the TFTs are made of polycrystalline silicon having high electron mobility, it is possible to increase switching speed and to reduce the size of the TFTs. However, since polycrystalline silicon is formed by high temperature fabrication processes, it is not possible to form the TFTs directly on the glass substrate of the LCD. Therefore, the TFTs formed on the glass substrate of the LCD are made of amorphous silicon formed using a low temperature fabrication process.
On the other hand, since a driving unit of the LCD needs a large number of switching elements to process digital signals, the driving unit is composed of a plurality of integrated circuits (IC) in which small transistors are integrated at high density. Therefore, the transistors used for the driving unit of the LCD must be made of polycrystalline silicon using high temperature fabrication processes.
Therefore, in the driving portion of the LCD, a plurality of ICs are separately formed on separate single crystalline silicon substrates. The integrated circuits are mounted on a tape carrier package (TCP). The integrated circuits are connected to the substrate of the LCD by a tape automated bonding (TAB) method or mounted on the substrate of the LCD by a chip-on-glass (COG) method to be combined with the substrate.
When the driving unit of the LCD is combined with the substrate by the TAB method or the chip-on-glass method, additional space is required for the driving portion of the LCD. Thus, it is difficult to miniaturize and to simplify the LCD. Moreover, as the number and the length of wiring lines for transmitting driving signals increase in larger displays, various noises and electromagnetic interference (EMI) are generated. Therefore, the reliability of larger displays deteriorates and manufacturing cost increases. Recently, advances in research on the formation of polycrystalline silicon using low temperature fabrication process have led to development of TFTs formed on the substrate of the LCD using polycrystalline silicon. As a result, an LCD integrated with a driving circuit in which a driving unit is mounted on the substrate of the LCD has been suggested.
FIG. 1 illustrates the structure of a related art liquid crystal display device (LCD) integrated with a driving circuit. Referring to FIG. 1, an LCD includes a liquid crystal display panel 10 in which gate lines 20 are horizontally arranged to be separated from each other by a predetermined distance and data lines 30 are vertically arranged to be separated from each other by a predetermined distance. The gate lines 20 and the data lines 30 cross each other. The gate lines and the data lines define pixel regions. A gate driving unit 50 is mounted on the liquid crystal display panel 10 to apply a scanning signal to the gate lines 20. A data driving unit 60 is mounted on the liquid crystal display panel 10 to apply a data signal to the data lines 30.
Pixel electrodes and TFTs are provided in the respective pixels 40. The TFTs include gate electrodes connected to the gate lines 20, source electrodes connected to the data lines 30, and drain electrodes connected to the pixel electrodes. Gate pads (not shown) and data pads (not shown) are formed at the ends of each of the gate lines 20 and the data lines 30.
The gate driving unit 50 sequentially applies the scanning signal to the gate lines through the gate pads and the data driving unit 60 applies the data signal to the data lines 30 through the data pads such that the pixels 40 of the liquid crystal display panel 10 are separately driven to display desired images by the liquid crystal display panel 10. The gate driving unit 50 and the data driving unit 60 mounted on the liquid crystal display panel 10 are simultaneously formed in a process of manufacturing the thin film transistor array substrate of the liquid crystal display panel 10.
The number and the length of data lines and gate lines increase in accordance with the resolution and the area of the driving circuit, thereby increasing the load. Also, since the amount of the data signal processed when driving the LCD significantly increases, the driving unit of the LCD must be driven at a higher speed. However, the load of the data lines and the gate lines can increase such that it is not possible to apply the desired signals in a short enough time. Therefore, an analog buffer capable of applying the desired signals in a short time in accordance with the load of the data lines and the gate lines is essential for proper operation at high resolution in a large area LCD.
In general, since the transistors made of single crystalline silicon have nearly identical electrical characteristics, these transistors can be used to design an operational amplifier to be used as the analog buffer. However, since the transistors made of polycrystalline silicon can have large differences in electrical characteristics, the operational amplifier designed with the polycrystalline silicon transistors has a large offset voltage and a large amount of power is consumed by static current such that the operational amplifier made of polycrystalline silicon transistors cannot be used as the analog buffer.
A driving circuit of a LCD needs an analog buffer that is insensitive to the differences in the electrical characteristics of the transistors made of polycrystalline silicon and that has a simple structure such that it is possible to reduce an occupied area and to reduce power consumption. A related art analog buffer that satisfies these requirements will be described in detail in reference to the attached drawings.
FIG. 2 illustrates an analog buffer in accordance with the related art. Referring to FIG. 2, the analog buffer includes a comparator for receiving an analog signal ANALOG_SIG through a first switch SW1 and a first capacitor C1 to correct variations in voltage of an output signal OUT_SIG applied to a data line D1, a second switch SW2 connected between the input port and the output port of the comparator COMP1, and a third switch SW3 connected between the first switch SW1 and the first capacitor C1. The first switch SW1 and the second switch SW2 are simultaneously turned on and off by a first control signal CS1. The third switch SW3 is turned on and off by a second control signal CS2.
FIG. 3 illustrates waveforms of a first control signal, a second control signal, and an output signal in the analog buffer depicted in FIG. 2. The driving of the related art analog buffer will be described in detail in reference to FIG. 3. Referring to FIG. 3, during an initialization period where a high voltage is applied as the first control signal CS1, the first switch SW1 is electrically connected such that the analog signal ANALOG_SIG is charged in the first capacitor C1 and the second switch SW2 is electrically connected such that the input port and the output port of the comparator COMP1 are initialized. Then, since a low voltage is applied as the second control signal CS2, the third switch SW3 is turned off. Therefore, during the initialization period, a voltage Vana-Vth obtained by subtracting a threshold voltage Vth of the comparator COMP1 from the voltage value Vana of the analog signal ANALOG_SIG is charged in the first capacitor C1.
During a signal application period where a high voltage is applied as the second control signal CS2, the third switch SW3 is electrically connected such that the voltage value Vana of the analog signal ANALOG_SIG is applied as the output signal OUT_SIG to the data line D1 through the electrically connected third switch SW3. Then, since a low voltage is applied as the first control signal CS1, the first switch SW1 and the second switch SW2 are turned off.
According to the related art analog buffer driven as described above, during the initialization period, an offset voltage is stored in the first capacitor C1 and, at the same time, the input port and the output port of the comparator COMP1 are initialized to correct the error corresponding to the difference in the electrical characteristics of the transistors forming the comparator COMP1. During the signal application period, the voltage value Vana of the analog signal ANALOG_SIG is applied as the output signal OUT_SIG to the data line D1 through the electrically connected third switch SW3.
When the voltage of the output signal OUT_SIG applied to the data line D1 changes, the comparator COMP1 changes the voltage of the input port to increase or reduce the voltage value Vana of the analog signal ANALOG_SIG together with the first capacitor C1. Specifically, when the voltage of the output signal OUT_SIG applied to the data line D1 rises, the voltage of the input port of the comparator COMP1 falls such that the comparator COMP1 reduces the voltage value Vana of the analog signal ANALOG_SIG together with the first capacitor C1. In contrast, when the voltage of the output signal OUT_SIG applied to the data line D1 falls, the voltage of the input port of the comparator COMP1 rises such that the comparator COMP1 increases the voltage value Vana of the analog signal ANALOG_SIG together with the first capacitor C1. Since the voltage value Vana of the analog signal ANALOG_SIG that is increased or reduced as described above is applied as the output signal OUT_SIG to the data line D1 through the third switch SW3, the change in the voltage of the output signal OUT_SIG is corrected such that a corrected voltage is applied to the data line D1.
Since the above-described related art analog buffer is driven in a state where the offset voltage is applied to the input port of the comparator COMP1, leakage current flows from the comparator COMP1. For example, in an experiment for testing the driving of a display panel through the above-described analog buffer, leakage current of about 80 μW is generated by the comparator COMP1 in a state where the offset voltage is applied to the input port of the comparator COMP1. In the case of a high resolution and large area LCD in which the load of the data line D1 connected to the output port of the comparator COMP1 is large, the size of the comparator COMP1 must be increased, thereby increasing leakage current and power consumption.